MICROPROCESSOR 8279 (3rd year cse )

8279 Programmable Keyboard/Display Interface Controller

1. The 8279 It is a 40 pin device with two major segments: keyboard and display

2. The keyboard segment cab be connected to a 64 key matrix keyboard

3. Keys are automatically debounced and stored in 8X8 FIFO RAM

4. Display section contain 16X8 display RAM. and display can be set
      up in either right entry or left entry format

8279 Architecture

The four major sections of 8279 are

1 keyboard,
2 scan,
2 display and
4 CPU interface.

8279 Block Diagram

Keyboard section:

1. The section has eight lines(RL0 - RL7) that can be connected to
     eight coluns of a keyboard matrix.

2. It has two additional input : shift and control/strobe.
 The keys are automatically debounced.

3. The two operating modes of keyboard section are
   1) 2-key lockout
   2) N-key rollover

4. In the 2-key lockout mode, if two keys are pressed simultaneously,
 only the first key is recognized.

5. In the N-key rollover mode simultaneous keys are recognized and
 their codes are stored in FIFO.

6. The keyboard section also have an 8 x 8 FIFO (First In First Out) RAM.
   The FIFO can store eight key codes in thescan keyboard mode.
   The status of the shift key and control key are also stored along with key code.

7. The 8279 generate an interrupt signal(IRQ) to MPU when the FIFO is not empty.

    Scan section:

1. The scan section has a scan counter and four scan lines, SL0 to SL3.

2. These four scan lines cab be decoded as 16 scan lines by using 4-to-16 decoder.

3. These scan lines are connected to the rows of a matrix keyboard and
    digit drivers of a multiplexed display

    Display section:

1. The display section has eight output lines divided into two groups A0-A3 and B0-B3.

2. The output lines can be used either as a single group of eight lines
    or as two groups of four lines, in  conjunctionwith the scan lines for
   a multiplexed display.

3. The display can be blanked by BD (low) line.

4. The display section consists of 16 x 8 display RAM.
    The CPU can read from or write into any location of the display RAM.

 CPU interface section:

1. This section has eight bidirectional data lines DB0 to DB7 for data transfer between 8279 and CPU.

2. it has one IRQ line+six lines for interfacing

3. It requires two internal address if A0 =0 for selecting data buffer and A0 = 1
    for selecting control register addressof 8279.

4. The control signals WR (low), RD (low), CS (low) and A0 are used
    for read/write to 8279.

5. The 8279 require an internal clock frequency of 100 kHz.
   This can be obtained by dividing the input clock by aninternal prescaler.

6. The RESET signal sets the 8279 in 16-character display with two -key
    lockout keyboard modes.

     8279 Data word Format:

Data word format used to read the pressed key

8279 Status word:

Status word used to read the status of the keys where key is pressed or not and check the others
conditions.

                                THANK YOU LEARNING