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MP 2 CHAPTERWISE QUESTIONS(3rd year cse)


                                                         3-1 B.Tech (CSE) 
Microprocessors-II                                                                        Sample Questions


UNIT – I


1) Describe the various methods of mapping I/O
    devices with examples  Discuss the relative advantages.

2) What is the significance of interrupt flag in a Microprocessor?

3) What is an assembler directive?
   List at least four assembler directives of 8086 μ p.

4) How many address lines are necessary to address two
    mega bytes (2048 k) of memory?

5) How are memories classified?

6) Differentiate between RAM, ROM, PROM, DRAM and SRAM.

7) In a microprocessor bits 0 to 10 are connected to various
    2K byte-memory are present in the system. Bits 11 and
    12 are not used, bits 13, 14, 15 are used for generating
    the chip-select for memories. Give the complete interfacing
    details and address range for each 2K byte block.

8) Explain how a 8 K*8 SRAM is interfaced to 8085 Microprocessor.

9) An 8085 based kit has the following:
   4 k ROM – 2 k x 2 (2716) 2 k RAM - 2k x 1 (6116) The memory
   addresses are sequential from 4000H onwards. Design
   the complete scheme and specify how the chip select (CS)
   signal is obtained. Show the neat diagram of the memory organization.


10) Distinguish between SRAM and DRAM.


11) Explain how 74LS138 decoder is used in interfacing
       memory with microprocessor.



12) An 8086 based micro computer in the minimum mode is to be
     designed to provide 2K x 16 EPROM and 1K x 16 SRAM and six 8
     bit I/O ports. Use 2716 EPROM, 2142 SRAM and 8255 I/O chips.
    Use suitable decoding circuits and give a neat detailed diagram
    showing important signal connections and memory map.

13) Give the I/O diagram, Functional block diagram, Function table,
      memory cell, and Read Timing diagram for 2K x 8 SRAM.
    Explain its working.

14) Design 16k x 8 SRAM memory interfacing at 4000H
      using 2k x 8 SRAMS with 8085 based system with fully
     decodes addressing logic.Give memory address range for
     each SRAM.

15) Give important specifications of a semiconductor memory device.

16) How a bit stored in a FAMOS device can be erased.

17) Distinguish between P interfacing and I/O interfacing.

18) An SRAM has an external organization of 8 K x 8. Internally the
      SRAM uses two-level decoding and an optimal memory array
     geometry. Draw a block diagram showing the functional blocks that
    make up the SRAM‟s internal structure and the external connections
   to these blocks. The memory has common I/O, an active low chip
   select, CS , an active low write enable, WE , and an active low output
   enable, OE . Be sure to include in your diagram input buffers, and
   output buffers, and control logic. Also provide the following
   information about the SRAM: number of logical words, number of
   physical words, number of bits in a logical word, number of bits in a
   physical word, and segmentation.


19) A memory system is to be designed that contains 16Kx8 of EPROM
     followed by 16K x 8 of RWM. The 16Kx8 of EPROM followed by
     16Kx8 of RWM. The 16Kx8 of EPROM starts at address OH and is
    implemented using a 27128A EPROM, which is 16Kx8. The
     27128A EPROM, which is 16Kx8. The 27128A has two control
    inputs, chip enable,CE , and output enable,OE . These devices have
    common I/O and control inputs CE , OE and WE . Decoding is to be
    exhaustive and accomplished using only a 74ALS138 decoder and a
    four-input AND gate. Draw the logic diagram of the memory
    system and its interface to the required signals from an 8085A or
    8086 system bus.

20) Write the memory cell for PROM and EPROM



UNIT – II



21) Programmable Logic Devices.

22) Half-adder implementation using PLDs

23) What is the advantages of interrupt driven I/O
     over the programme  I/O?

24) What is the significance of interrupt flag in a Microprocessor?

25) Explain the necessity of interfacing circuits.
      What are the variou methods of the I/O devices?

26) Explain the
                          (i) Polled interrupt scheme of I/O and
                          (ii) Vectored interrupt scheme of I/O.

27) Explain memory mapped I/O and I/O mapped I/O schemes.
      What are their relative merits.

28) Explain what you understand by handshaking in data transfer
       operation.

29) Distinguish between memory mapped I/O and I/O mapped I/O.

30) Give example for digital input device, digital
       output device anddigital input and output device.


31) What is I/O interfacing ? Is it same as μP, interfacing or not?
      Justify your answer with suitable examples. Explain clearly the
      general requirements of an interface circuit for commonly used
     I/O devices. Describe, in general,  certain types of registers
     with their functions, that are common to all programmable interface circuits.

32) What do you understand by “Interfacing an I/O device to P.”
      Give the characteristics and functions of different types of
       interfaces with respect to a P system.
      Outline briefly the procedure for interfacing an I/O device to a P based system.

33) Compare and contrast various I/O programming methods.


34) Write an I/O program that reads the DIP switch and if bit i is switched on, cause the corresponding decimal digit i to be displayed by the LED display unit.

UNIT – III


35) Explain mode-1 and mode-2 operations of 8255 PPI with suitable examples.

36) Explain how a set of 8 LEDS can be made ON/OFF
      using switches through an interfacing  peripheral and
     8085 or 8086microprocessor.

37) Write initialization instructions for 8255PPI to set-up in mode „o‟

 (i)    PORT-A as an input port
 (ii)   PORT-B as an output port
 (iii)  PORT-C (low) as an output port and
 (iv)  PORT-C (high) as an input port.

38) Briefly describe the various modes of operation 8255 PPI.
       How is it useful in interfacing I/O devices?

39) An A/D converter output is to be inputted using 8255 port A.
       The A/D converter is of 12-bit resolution. Use PC6 for start of
     conversion and the end of conversion is connected to STBA.
     Use status check for inputting the data. Write an 8086 ALP to
     acquire the data and store it in location DATA

40) What are the various modes of operations of 8255 PPI chip?


41) Sketch and explain the block diagram of 8255 PPI.
      Explain the operations of mode 0, mode 1 and mode 2 of 8255.

42) An 12-bit ADC is to be interfaced to 8086 through
      8255 I/O ports. Give the full interfacing details as
      a memory mapped I/O with a simple program to
     demonstrate input and output operations.

43) Interface two 8255s with 8051 and write an ALP
      to initialize the 8255 chips with all ports or input
      ports in mode „0‟. Read all the 8255 ports and store
     the data read from 8255 ports in the external RAM
     at the addresses starting from D000H.

44) Identify peripheral interface IC you have studied
      that has maximum number of μp interface signals.

45) Give Hardware and Software to interface a 4 x 4
      Push Button Keyboard matrix to 8086-based system
       using 8255 via a single port only.

46) The 8255 PPI is to be used to interface a single seven
       segment LED display unit and an 8-bit DIP switch to
        an 8085 based system.

47) Draw a logic diagram showing all connections between
       the LED, the DIP switch, the 8255, and the system bus.
      Show also any additional components needed, such as driver circuits.

48) Assume that two similar P based systems are to be
     linked for exchanging messages. Consider a message
     as a sequence of maximum 100 data bytes that must be
     transferred from the main memory of one system to that
     of the other system. Message transfer is accomplished by
    each system treating the other as one of its I/O devices.
    Using either 8085 or 8086 to complement the host Ps.,
    carry out the following:

49) Design a suitable hardware interface for intersystem
      communication based on programmable interface
      circuits such as the 8255 or 8251.

50) Write the structure of software needed for message
      transfer, explaining clearly how the activities of the
       two Ps are synchronized.


51) What is the necessity of interrupt controller?
       Explain with the help of neat block diagram the
       operation of8259 –Interrupt controller interface.

52) What are the different modes of 8253 timer operation?

53) What is meant by “wait state” and when is it used?

54) Explain how do you interface a 8259 PIC to 8086 μp.
      Describe dthe differences between a “protected mode”
     and “real mode” interrupt.

55) Explain the architecture of 8279 programmable display/keyboard interface chip.

56) Give a neat schematic of 8251 USART and describe its operation.

57) Write an ALP for 8086 to transmit a set of 100 characters using
      8251 USART. Assume the  register addresses

58) Specify the mode word of 8251 USART for the following:
      (i)Asynchronous mode.
      (ii) 1x64 Baud rate factor.
      (iii) 8-bit character
      (iv) Odd parity
      (v) Two stop bits.

59) What do you understand by priority of a device?
      When does the need for defining priority arises.

60) How is the priority determined in case of
      (i) soft-ware polled interrupts and
      (ii) hard-ware polled interrupts.

61) Is it possible to change the priority when
         (i) software polling
        (ii) hard-ware polling is used? If so how it can be done?

62) Explain briefly the various modes available in 8253 timer chip.
      Give an initialization sequence for generating a 1 kHz square wave.
      Assume a 2MHz clock is available.

63) With the help of a block diagram, give the details of how a PIC 8259
       is interfaced to 8086. Explain the functions of all control signals used.


64) How do you interface a CRT data terminal to an 8086 CPU using 8251 USART?
      Discuss the hardware and software aspects of interface.

65) Distinguish between synchronous and asynchronous data
      transfer methods with examples.

66) Keyboard / Display interface. What is “On the fly”
    operation in 8253?

67) Design the hardware and software required for 8085 or 8086 based
 system for accepting data from an encoded ASCII keyboard and sending
 out the same data to a serial output device with 7-bit data, even parity,
 1 stop bit and 1200 baud using USART. Use a Programmable Interval
Timer for clocking the USART and programmable keyboard and display
 interface for ASCII keyboard.

68) Programmable features of 8259

69) Various modes of operation of 8253-Timer-interface.

70) Programmable features of 8259

71) Give the status register details of peripheral IC-8279.

72) 8253 Timer Architecture (c) Programming 8279


UNIT – IV



73) What is the necessity of sample and hold circuit in interfacing
       ADC to Microprocessor?

74) Explain the various methods of Analog to Digital conversion
       techniques and compare their performances.

75) Explain how an 8-bit ADC is interfaced to 8085
      or 8086 microprocessor.

76) What is “short cycle” operation of an ADC and when is it used?

77) Calculate the resolution of a 12-bit D/A converter for a 10V maximum range.

78) What do you understand by ± ½ LSB specification in data converters?


79) Draw the logic diagram of a hardware structure to support
      software driven A/D conversion. A 10-bit DAC, comparator,
     Tri-state buffer, and logic for device selection is all the hardware
     to be used. The DAC is to be treated as if it were a 1024 x 1 block
     of memory. The data inputs of DAC are to be connected to the address
    bus. Describe the timing constraints on the circuit for it to operate properly.
    Write a subroutine that implements a counting type A/D converter
    with this hardware. Assume either 8085 or 8086 μP for implementation.

80) What are the different Digital to Analog Converter methods ?
       Explain one of the methods in detail for a 4-bit DAC with
       suitable numerical assignment.

81) Generate a saw-tooth waveform of amplitude 5 V and
      frequency of 10 kHz by interfacing an 8-bit DAC to
      8086-based system.

82) DAC and ADC specifications

83) A 12-bit ADC is operating with 1Sec clock period and
     the total conversion time is seen to be 14Secs.
    Write the type of this ADC with a brief justification.

84) Write clearly the complete specifications of 8-bit DAC device
       and 8-bit ADC device.

85) Write both hardware and software to implement 8-bit ADC
        using 8-bit DAC by interfacing 8-bit DAC to 8085 based system


UNIT – V


86) Write an 8051 assembly language program to add an array of numbers
       stored in memory.

87) Give the difference between Microprocessor and Microcontroller.
      Draw the block diagram of 8051 and explain the function of each block.

88) Write an 8051 Assembly Language program to find the average of „N‟-numbers.

89) Mention all possible interrupts with 8051 micro-controller and
      give their vector addresses.

90) Explain in detail the Timer/Counter operation of 8051 micro-controller.

91) Explain why mode „O‟ is not suitable for 8051 communications.
      Explain in detail mode „1‟ operation of UART in 8051.

92) What are the differences between 8031 and 8051 microcontrollers?

93) Explain the different methods of operations of Timer/Counter
      of 8051 microcontroller.

94) Distinguish between Microprocessors and Microcontrollers.

95) Explain addressing Modes of 8051 with example instructions
      and Numerical value assignment. Write 8051 Assembly language
      Program that transfers a block of data from source address to
      destination address. Assume suitable data.

96) What are the important features of 8051?

97) Write briefly 8051 architectural features. Write 8051 assembly
     language program to read 4-bit binary number from an input port
     and display its 2‟s complement value on a 7-segment LED display
     at an output port.

UNIT – VI


98) ROM BIOS and BIOS function calls.

 99) BIOS function calls.

100) What are the uses of BIOS function calls?

101) DOS function calls.

102) Describe briefly the hardware and software aspects of PC Architecture.

103) Distinguish between BIOS function call and DOS function call.

104) Briefly discuss about hardware organization of IBM compatible PC.
       Write either assembly language program or high level program to read a
      character from keyboard and display on the screen of PC continuously
     using DOS function calls.



                              THANK YOU LEARNING













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